encode circuit中文是什么意思

發(fā)音:

中文翻譯
造句

編碼電路

encode vt. 把(電文)譯成電碼[密碼]. n. -ment ...
circuit n. 1.(某一范圍的)周邊一圈；巡回，周游；巡回路線[ ...
encode vt. 把(電文)譯成電碼[密碼]. n. -ment
to encode 編碼; 內(nèi)碼
absolute encode 絕對編碼
block encode 塊編碼
direct encode 直接編碼
dolby encode 杜比編碼
encode address 編碼地址
encode block 碼組
encode by groub 按組編碼
encode by group 按組編碼
encode combination 碼組合
encode control 編碼控制
encode data 編碼數(shù)據(jù)
encode element 碼元
encode input 編碼輸入
encode key 編碼鍵
encode mode 編碼模式
encode processor 編碼處理機; 編碼處理器
encode statement 編碼語句
encode stereo 編碼立體聲
encode table 編碼表
end of encode 編碼結(jié)束
end-of-encode 編碼結(jié)束

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例句與用法

The chapter of hardware design first expounds the whole design . the several primary circuit are designed , including power circuit , controlling circuit , detecting circuit and the dsp quadrature encode circuit
硬件部分先作了整體設(shè)計的論述，然后具體介紹了功率電路、控制電路、檢測電路以及dsp的正交解碼電路。
As the random structure of ldpc codes made it difficult to encoding in hardware and few mathematic methods has been found for analyzing these codes , many constructed ldpc codes were investigated to simplify encoding circuit and to reduce the complexity of analyses
隨機構(gòu)造的ldpc碼缺乏系統(tǒng)的分析理論,且編碼部分的硬件實現(xiàn)困難,成為ldpc碼應(yīng)用的一個瓶頸,因此許多的結(jié)構(gòu)化的ldpc碼被相繼提出,以簡化編碼的硬件復(fù)雜度和理論分析的難度。
Based on the research and analysis of system structure of 10 - bit 100msps pipelined cmos adc , according to the system performance , the specifications of sub _ adc is obtained , while the sub _ adc including the preamplifier - latch comparator , the reference ladder resistance and the clock - control encode circuits are discussed in detail
基于對10 - bit100mspspipelinedcmosadc系統(tǒng)結(jié)構(gòu)的分析研究,結(jié)合系統(tǒng)性能確定了子adc的指標要求,詳細討論并設(shè)計了子adc單元模塊的設(shè)計,包括預(yù)放大鎖存比較器,參考電阻串和時鐘控制編碼電路。
Secondly , compared with some other kinds of comparator structure and based on the preamplifier - latch fast - compare theory , a novel topology of cmos preamplifier latch comparator circuit is presented . considering trade - off between kickback noise and power dissipation , reference resistance value is optimized . according to the encode demands of different stage resolution , clock - control encode circuit is designed
其后,在具體的子adc設(shè)計中,對比各比較器類型的優(yōu)缺點,并基于預(yù)放大鎖存快速比較理論,提出一種新型高速低功耗預(yù)放大鎖存比較器電路拓撲;根據(jù)adc系統(tǒng)所允許的參考電壓最大波動限制,在回饋噪聲對輸入?yún)⒖茧娖降挠绊懞凸闹g折衷,確定優(yōu)化的參考電阻串阻值;根據(jù)不同級精度的編碼要求,設(shè)計出時鐘控制編碼電路。

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